搜索项目

搜索 "systemverilog" 找到 3 个结果

basic_verilog

Must-have verilog systemverilog modules

⭐⭐⭐☆☆ (3/5) 1672
altera debounce delay
AXI片上通信高性能SystemVerilog模块

AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication

⭐⭐⭐☆☆ (3/5) 1412
asic axi axi4
clash-lang/clash-compiler

Haskell to VHDL/Verilog/SystemVerilog compiler

⭐⭐⭐☆☆ (3/5) 664
asic fpga hardware-description-language